6502 Instruction Set

The table below shows the instruction set for the 6502 and 65C02. The 65C02 supports all the instructions of the 6502 but has additional instructions which are shown in blue. To find the op-code for the instruction, find its row and use the first hex digit shown in the first column of that row and the second hex digit from the column heading. For example, “STA abs,X” is 9D.

x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF
0x BRK ORA (zp,X) TSB zp ORA zp ASL zp PHP ORA #im ASL A TSB abs ORA abs ASL abs
1x BPL rel ORA (zp),Y ORA (zp) TRB zp ORA zp,X ASL zp,X CLC ORA abs,Y INC A TRB abs ORA abs,X ASL abs,X
2x JSR abs AND (zp,X) BIT zp AND zp ROL zp PLP AND #im ROL A BIT abs AND abs ROL abs
3x BMI rel AND (zp),Y AND (zp) BIT zp,X AND zp,X ROL zp,X SEC AND abs,Y DEC A BIT abs,X AND abs,X ROL abs,X
4x RTI EOR (zp,X) EOR zp LSR zp PHA EOR #im LSR A JMP abs EOR abs LSR abs
5x BVC rel EOR (zp),Y EOR (zp) EOR zp,X LSR zp,X CLI EOR abs,Y PHY EOR abs,X LSR abs,X
6x RTS ADC (zp,X) STZ zp ADC zp ROR zp PLA ADC #im ROR A JMP (abs) ADC abs ROR abs
7x BVS rel ADC (zp),Y ADC (zp) STZ zp,X ADC zp,X ROR zp,X SEI ADC abs,Y PLY JMP (abs,X) ADC abs,X ROR abs,X
8x BRA rel STA (zp,X) STY zp STA zp STX zp DEY BIT #im TXA STY abs STA abs STX abs
9x BCC rel STA (zp),Y STA (zp) STY zp,X STA zp,X STX zp,Y TYA STA abs,Y TXS STZ abs STA abs,X STZ abs,X
Ax LDY #im LDA (zp,X) LDX #im LDY zp LDA zp LDX zp TAY LDA #im TAX LDY abs LDA abs LDX abs
Bx BCS rel LDA (zp),Y LDA (zp) LDY zp,X LDA zp,X LDX zp,Y CLV LDA abs,Y TSX LDY abs,X LDA abs,X LDX abs,Y
Cx CPY #im CMP (zp,X) CPY zp CMP zp DEC zp INY CMP #im DEX CPY abs CMP abs DEC abs
Dx BNE rel CMP (zp),Y CMP (zp) CMP zp,X DEC zp,X CLD CMP abs,Y PHX CMP abs,X DEC abs,X
Ex CPX #im SBC (zp,X) CPX zp SBC zp INC zp INX SBC #im NOP CPX abs SBC abs INC abs
Fx BEQ rel SBC (zp),Y SBC (zp) SBC zp,X INC zp,X SED SBC abs,Y PLX SBC abs,X INC abs,X

The addressing modes are as follows:

A Operates on the accumulator
#im Uses the value immediately in the instruction stream
zp Zero-page address
zp,X Zero-page address indexed by X
zp,Y Zero-page address indexed by Y
rel Relative offset (for branches)
abs Absolute two-byte address
abs,X Absolute two-byte address indexed by X
abs,Y Absolute two-byte address indexed by Y
(abs) Indirect two-byte address
(zp,X) Indirect zero-page address indexed by X
(zp),Y Indirect zero-page address indexed by Y
(zp) Indirect zero-page address
(abs,X) Indirect two-byte address indexed by X (65C02)

The instruction codes have the following meanings:

ADC Add with carry
AND Logical AND
ASL Arithmetic shift left
BCC Branch if carry clear
BCS Branch if carry set
BEQ Branch if zero
BIT Bit test
BMI Branch if minus
BNE Branch if not zero
BPL Branch if plus
BRK Break execution flow
BVC Branch if overflow clear
BVS Branch if overflow set
CLC Clear carry flag
CLD Clear decimal-mode flag
CLI Clear interrupt mask flag
CLV Clear overflow flag
CMP Compare
CPX Compare X register
CPY Compare Y register
DEC Decrement
DEX Decrement X register
DEY Decrement Y register
EOR Logical Exclusive OR
INC Increment
INX Increment X register
INY Increment Y register
JMP Jump
JSR Jump to subroutine
LDA Load accumulator
LDX Load X register
LDY Load Y register
LSR Logical shift right
NOP No operation
ORA Logical OR
PHA Push accumulator onto stack
PHP Push processor status register onto stack
PLA Pull accumulator from stack
PLP Pull processor status register from stack
ROL Rotate left
ROR Rotate right
RTI Return from interrupt
RTS Return from subroutine
SBC Subtract with carry
SEC Set carry flag
SED Set decimal-mode flag
SEI Set interrupt mask flag
STA Store accumulator
STX Store X register
STY Store Y register
TAX Transfer accumulator to X register
TAY Transfer accumulator to Y register
TSX Transfer stack point to X register
TXA Transfer X register to accumulator
TXS Transfer X register to stack pointer
TYA Transfer Y register to accumulator
TSB Test and set bits
TRB Test and reset bits
STZ Store zero
PHY Push Y register onto stack
PLY Pull Y register from stack
PHX Push X register onto stack
PLX Pull X register from stack
BRA Relative branch